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Study guide 23 EC C Analog MOS Circuits Guide line Prepared by Vishnu N V Sincere Thanks to Sindhu L Lecturer in ECE GEC Sreekrishnapuram www edutalks org CIntroduction indicates out of syllabus ? CMOS circuit design consists of de ?ning i ps o ps hand ca

EC C Analog MOS Circuits Guide line Prepared by Vishnu N V Sincere Thanks to Sindhu L Lecturer in ECE GEC Sreekrishnapuram www edutalks org CIntroduction indicates out of syllabus ? CMOS circuit design consists of de ?ning i ps o ps hand calculations ckt simulations layout of the ckt etc ? CMOS ICs are fabricated on thin circular slices of Si called wafers Each wafer contains individual chips or ??die ? www edutalks org CIntroduction www edutalks org CMOSFET symbols www edutalks org CMODULE Reference ??CMOS Circuit Design Layout and Simulation ? Baker Li Boyce Page no - www edutalks org CAnalog MOS models ? Low frequency model ? Study Expressions for Threshold voltage I VTHN D beta ? MOS in saturation Refer ?g ? When MOSFET is in saturation VDS VGS -VTHN www edutalks org CHigh Frequency Model Page ? To obtain high frequency model add capacitance to the low frequency model ? Capacitance b w gate and Source Cgs ? Capacitance b w gate and drain Cgd ? Capacitance b w drain and source di ?usion region Cdb Csb ? Capacitance of gate over ?eld region www edutalks org CTemperature e ?ects in MOSFET ? Threshold voltage and Trance conductance parameter changes with temperature www edutalks org CNoise in MOSFETS ? The noise generators in MOSFETS are due to ? Thermal noise and ? Flicker f ??one over f noise ? The rms thermal noise current is generated by ? the e ?ective channel resistance gm ? Parasitic drain source gate and substrate resistances RD RS RG RB www edutalks org CNoise in MOST ? ? www edutalks org CNoise cont ? ? ? www edutalks org CModule Reference ??CMOS Circuit Design Layout and Simulation ? Baker Li Boyce Page no - www edutalks org CCurrent sources and Sinks www edutalks org CCurrent sources and Sinks www edutalks org C www edutalks org CSimple source www edutalks org CSimple source www edutalks org CSimple source ? www edutalks org CSimple source ? www edutalks org CSimple source ? www edutalks org CSimple source ? www edutalks org CCascode source ? To increase the output resistance of a current source or sink www edutalks org CCascode source www edutalks org CTriple Cascode www edutalks org COther Current sources or Sinks ? The basic current mirror can be improved signi ?cantly with negative feedback such as ? Wilson current mirror ? Regulated cascode ? Both o ?er stable current values for wide voltage swings and enhanced output impedance ? Regulated cascode o ?er higher degree of o p impedance current stability www edutalks org CWilson current source www edutalks org CRegulated cascode ? Regulated cascode O ?ers signi ?cant advantages over others O p impedance is signi ?cantly higher Minimum value of Vo is lower than most of the other con ?gurations Higher degree of current stability www edutalks org CReferences ? In CMOS circuits we derive reference voltages from power supplies by ? Resistor and MOSFET ? MOSFET